/* linux/include/asm-arm/arch-at91sam9260/at91sam9260_isi.h
 * 
 * Hardware definition for the isi peripheral in the ATMEL at91sam9260 processor
 * 
 * Generated  12/07/2006 (15:04:00) AT91 SW Application Group from ISI_xxxxx V1.3
 * 
 * This program is free software; you can redistribute it and/or modify it
 * under the terms of the GNU General Public License as published by the
 * Free Software Foundation; either version 2 of the License, or (at your
 * option) any later version.
 * 
 * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR
 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
 * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
 * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
 * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
 * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
 * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 * 
 * You should have received a copy of the  GNU General Public License along
 * with this program; if not, write  to the Free Software Foundation, Inc.,
 * 675 Mass Ave, Cambridge, MA 02139, USA.
 */


#ifndef __AT91SAM9260_ISI_H
#define __AT91SAM9260_ISI_H

/* -------------------------------------------------------- */
/* ISI ID definitions for  AT91SAM9260           */
/* -------------------------------------------------------- */
#ifndef AT91C_ID_HISI
#define AT91C_ID_HISI  	22 /**< Image Sensor Interface id */
#endif /* AT91C_ID_HISI */

/* -------------------------------------------------------- */
/* ISI Base Address definitions for  AT91SAM9260   */
/* -------------------------------------------------------- */
#define AT91C_BASE_HISI      	0xFFFC0000 /**< HISI base address */

/* -------------------------------------------------------- */
/* PIO definition for ISI hardware peripheral */
/* -------------------------------------------------------- */
#define AT91C_PB20_ISI_D0   	(1 << 20) /**< Image Sensor Data 0 */
#define AT91C_PB21_ISI_D1   	(1 << 21) /**< Image Sensor Data 1 */
#define AT91C_PB12_ISI_D10  	(1 << 12) /**< Image Sensor Data 10 */
#define AT91C_PB13_ISI_D11  	(1 << 13) /**< Image Sensor Data 11 */
#define AT91C_PB22_ISI_D2   	(1 << 22) /**< Image Sensor Data 2 */
#define AT91C_PB23_ISI_D3   	(1 << 23) /**< Image Sensor Data 3 */
#define AT91C_PB24_ISI_D4   	(1 << 24) /**< Image Sensor Data 4 */
#define AT91C_PB25_ISI_D5   	(1 << 25) /**< Image Sensor Data 5 */
#define AT91C_PB26_ISI_D6   	(1 << 26) /**< Image Sensor Data 6 */
#define AT91C_PB27_ISI_D7   	(1 << 27) /**< Image Sensor Data 7 */
#define AT91C_PB10_ISI_D8   	(1 << 10) /**< Image Sensor Data 8 */
#define AT91C_PB11_ISI_D9   	(1 << 11) /**< Image Sensor Data 9 */
#define AT91C_PB30_ISI_HSYNC 	(1 << 30) /**< Image Sensor Horizontal Synchro */
#define AT91C_PB31_ISI_MCK  	(1 << 31) /**< Image Sensor Reference Clock */
#define AT91C_PB28_ISI_PCK  	(1 << 28) /**< Image Sensor Data Clock */
#define AT91C_PB29_ISI_VSYNC 	(1 << 29) /**< Image Sensor Vertical Synchro */


/* -------------------------------------------------------- */
/* Register offset definition for ISI hardware peripheral */
/* -------------------------------------------------------- */
#define ISI_CR1 	(0x0000) 	/**< Control Register 1 */
#define ISI_CR2 	(0x0004) 	/**< Control Register 2 */
#define ISI_SR 	(0x0008) 	/**< Status Register */
#define ISI_IER 	(0x000C) 	/**< Interrupt Enable Register */
#define ISI_IDR 	(0x0010) 	/**< Interrupt Disable Register */
#define ISI_IMR 	(0x0014) 	/**< Interrupt Mask Register */
#define ISI_PSIZE 	(0x0020) 	/**< Preview Size Register */
#define ISI_PDECF 	(0x0024) 	/**< Preview Decimation Factor Register */
#define ISI_PFBD 	(0x0028) 	/**< Preview Frame Buffer Address Register */
#define ISI_CDBA 	(0x002C) 	/**< Codec Dma Address Register */
#define ISI_Y2RSET0 	(0x0030) 	/**< Color Space Conversion Register */
#define ISI_Y2RSET1 	(0x0034) 	/**< Color Space Conversion Register */
#define ISI_R2YSET0 	(0x0038) 	/**< Color Space Conversion Register */
#define ISI_R2YSET1 	(0x003C) 	/**< Color Space Conversion Register */
#define ISI_R2YSET2 	(0x0040) 	/**< Color Space Conversion Register */

/* -------------------------------------------------------- */
/* Bitfields definition for ISI hardware peripheral */
/* -------------------------------------------------------- */
/* --- Register ISI_CR1 */
#define AT91C_ISI_RST         (0x1 << 0 ) /**< (ISI) Image sensor interface reset */
#define AT91C_ISI_DISABLE     (0x1 << 1 ) /**< (ISI) image sensor disable. */
#define AT91C_ISI_HSYNC_POL   (0x1 << 2 ) /**< (ISI) Horizontal synchronisation polarity */
#define AT91C_ISI_HSYNC_POL   (0x1 << 3 ) /**< (ISI) Vertical synchronisation polarity */
#define AT91C_ISI_PIXCLK_POL  (0x1 << 4 ) /**< (ISI) Pixel Clock Polarity */
#define AT91C_ISI_EMB_SYNC    (0x1 << 6 ) /**< (ISI) Embedded synchronisation */
#define AT91C_ISI_CRC_SYNC    (0x1 << 7 ) /**< (ISI) CRC correction */
#define AT91C_ISI_CRC_SYNC    (0x7 << 8 ) /**< (ISI) Frame rate capture */
#define AT91C_ISI_FULL        (0x1 << 12) /**< (ISI) Full mode is allowed */
#define AT91C_ISI_THMASK      (0x3 << 13) /**< (ISI) DMA Burst Mask */
#define 	AT91C_ISI_THMASK_4_8_16_BURST         (0x0 << 13) /**< (ISI) 4,8 and 16 AHB burst are allowed */
#define 	AT91C_ISI_THMASK_8_16_BURST           (0x1 << 13) /**< (ISI) 8 and 16 AHB burst are allowed */
#define 	AT91C_ISI_THMASK_16_BURST             (0x2 << 13) /**< (ISI) Only 16 AHB burst are allowed */
#define AT91C_ISI_CODEC_ON    (0x1 << 15) /**< (ISI) Enable the codec path */
#define AT91C_ISI_SLD         (0xFF << 16) /**< (ISI) Start of Line Delay */
#define AT91C_ISI_SFD         (0xFF << 24) /**< (ISI) Start of frame Delay */
/* --- Register ISI_CR2 */
#define AT91C_ISI_IM_VSIZE    (0x7FF << 0 ) /**< (ISI) Vertical size of the Image sensor [0..2047] */
#define AT91C_ISI_GS_MODE     (0x1 << 11) /**< (ISI) Grayscale Memory Mode */
#define AT91C_ISI_RGB_MODE    (0x3 << 12) /**< (ISI) RGB mode */
#define 	AT91C_ISI_RGB_MODE_RGB_888              (0x0 << 12) /**< (ISI) RGB 8:8:8 24 bits */
#define 	AT91C_ISI_RGB_MODE_RGB_565              (0x1 << 12) /**< (ISI) RGB 5:6:5 16 bits */
#define 	AT91C_ISI_RGB_MODE_RGB_555              (0x2 << 12) /**< (ISI) RGB 5:5:5 16 bits */
#define AT91C_ISI_GRAYSCALE   (0x1 << 13) /**< (ISI) Grayscale Mode */
#define AT91C_ISI_RGB_SWAP    (0x1 << 14) /**< (ISI) RGB Swap */
#define AT91C_ISI_COL_SPACE   (0x1 << 15) /**< (ISI) Color space for the image data */
#define AT91C_ISI_IM_HSIZE    (0x7FF << 16) /**< (ISI) Horizontal size of the Image sensor [0..2047] */
#define AT91C_ISI_RGB_MODE    (0x3 << 28) /**< (ISI) Ycc swap */
#define 	AT91C_ISI_RGB_MODE_YCC_DEF              (0x0 << 28) /**< (ISI) Cb(i) Y(i) Cr(i) Y(i+1) */
#define 	AT91C_ISI_RGB_MODE_YCC_MOD1             (0x1 << 28) /**< (ISI) Cr(i) Y(i) Cb(i) Y(i+1) */
#define 	AT91C_ISI_RGB_MODE_YCC_MOD2             (0x2 << 28) /**< (ISI) Y(i) Cb(i) Y(i+1) Cr(i) */
#define 	AT91C_ISI_RGB_MODE_YCC_MOD3             (0x3 << 28) /**< (ISI) Y(i) Cr(i) Y(i+1) Cb(i) */
#define AT91C_ISI_RGB_CFG     (0x3 << 30) /**< (ISI) RGB configuration */
#define 	AT91C_ISI_RGB_CFG_RGB_DEF              (0x0 << 30) /**< (ISI) R/G(MSB)  G(LSB)/B  R/G(MSB)  G(LSB)/B */
#define 	AT91C_ISI_RGB_CFG_RGB_MOD1             (0x1 << 30) /**< (ISI) B/G(MSB)  G(LSB)/R  B/G(MSB)  G(LSB)/R */
#define 	AT91C_ISI_RGB_CFG_RGB_MOD2             (0x2 << 30) /**< (ISI) G(LSB)/R  B/G(MSB)  G(LSB)/R  B/G(MSB) */
#define 	AT91C_ISI_RGB_CFG_RGB_MOD3             (0x3 << 30) /**< (ISI) G(LSB)/B  R/G(MSB)  G(LSB)/B  R/G(MSB) */
/* --- Register ISI_SR */
#define AT91C_ISI_SOF         (0x1 << 0 ) /**< (ISI) Start of Frame */
#define AT91C_ISI_DIS         (0x1 << 1 ) /**< (ISI) Image Sensor Interface disable */
#define AT91C_ISI_SOFTRST     (0x1 << 2 ) /**< (ISI) Software Reset */
#define AT91C_ISI_CRC_ERR     (0x1 << 4 ) /**< (ISI) CRC synchronisation error */
#define AT91C_ISI_FO_C_OVF    (0x1 << 5 ) /**< (ISI) Fifo Codec Overflow  */
#define AT91C_ISI_FO_P_OVF    (0x1 << 6 ) /**< (ISI) Fifo Preview Overflow  */
#define AT91C_ISI_FO_P_EMP    (0x1 << 7 ) /**< (ISI) Fifo Preview Empty */
#define AT91C_ISI_FO_C_EMP    (0x1 << 8 ) /**< (ISI) Fifo Codec Empty */
#define AT91C_ISI_FR_OVR      (0x1 << 9 ) /**< (ISI) Frame rate overun */
/* --- Register ISI_IER */
#define AT91C_ISI_SOF         (0x1 << 0 ) /**< (ISI) Start of Frame */
#define AT91C_ISI_DIS         (0x1 << 1 ) /**< (ISI) Image Sensor Interface disable */
#define AT91C_ISI_SOFTRST     (0x1 << 2 ) /**< (ISI) Software Reset */
#define AT91C_ISI_CRC_ERR     (0x1 << 4 ) /**< (ISI) CRC synchronisation error */
#define AT91C_ISI_FO_C_OVF    (0x1 << 5 ) /**< (ISI) Fifo Codec Overflow  */
#define AT91C_ISI_FO_P_OVF    (0x1 << 6 ) /**< (ISI) Fifo Preview Overflow  */
#define AT91C_ISI_FO_P_EMP    (0x1 << 7 ) /**< (ISI) Fifo Preview Empty */
#define AT91C_ISI_FO_C_EMP    (0x1 << 8 ) /**< (ISI) Fifo Codec Empty */
#define AT91C_ISI_FR_OVR      (0x1 << 9 ) /**< (ISI) Frame rate overun */
/* --- Register ISI_IDR */
#define AT91C_ISI_SOF         (0x1 << 0 ) /**< (ISI) Start of Frame */
#define AT91C_ISI_DIS         (0x1 << 1 ) /**< (ISI) Image Sensor Interface disable */
#define AT91C_ISI_SOFTRST     (0x1 << 2 ) /**< (ISI) Software Reset */
#define AT91C_ISI_CRC_ERR     (0x1 << 4 ) /**< (ISI) CRC synchronisation error */
#define AT91C_ISI_FO_C_OVF    (0x1 << 5 ) /**< (ISI) Fifo Codec Overflow  */
#define AT91C_ISI_FO_P_OVF    (0x1 << 6 ) /**< (ISI) Fifo Preview Overflow  */
#define AT91C_ISI_FO_P_EMP    (0x1 << 7 ) /**< (ISI) Fifo Preview Empty */
#define AT91C_ISI_FO_C_EMP    (0x1 << 8 ) /**< (ISI) Fifo Codec Empty */
#define AT91C_ISI_FR_OVR      (0x1 << 9 ) /**< (ISI) Frame rate overun */
/* --- Register ISI_IMR */
#define AT91C_ISI_SOF         (0x1 << 0 ) /**< (ISI) Start of Frame */
#define AT91C_ISI_DIS         (0x1 << 1 ) /**< (ISI) Image Sensor Interface disable */
#define AT91C_ISI_SOFTRST     (0x1 << 2 ) /**< (ISI) Software Reset */
#define AT91C_ISI_CRC_ERR     (0x1 << 4 ) /**< (ISI) CRC synchronisation error */
#define AT91C_ISI_FO_C_OVF    (0x1 << 5 ) /**< (ISI) Fifo Codec Overflow  */
#define AT91C_ISI_FO_P_OVF    (0x1 << 6 ) /**< (ISI) Fifo Preview Overflow  */
#define AT91C_ISI_FO_P_EMP    (0x1 << 7 ) /**< (ISI) Fifo Preview Empty */
#define AT91C_ISI_FO_C_EMP    (0x1 << 8 ) /**< (ISI) Fifo Codec Empty */
#define AT91C_ISI_FR_OVR      (0x1 << 9 ) /**< (ISI) Frame rate overun */
/* --- Register ISI_PSIZE */
#define AT91C_ISI_PREV_VSIZE  (0x3FF << 0 ) /**< (ISI) Vertical size for the preview path */
#define AT91C_ISI_PREV_HSIZE  (0x3FF << 16) /**< (ISI) Horizontal size for the preview path */
/* --- Register ISI_Y2R_SET0 */
#define AT91C_ISI_Y2R_C0      (0xFF << 0 ) /**< (ISI) Color Space Conversion Matrix Coefficient C0 */
#define AT91C_ISI_Y2R_C1      (0xFF << 8 ) /**< (ISI) Color Space Conversion Matrix Coefficient C1 */
#define AT91C_ISI_Y2R_C2      (0xFF << 16) /**< (ISI) Color Space Conversion Matrix Coefficient C2 */
#define AT91C_ISI_Y2R_C3      (0xFF << 24) /**< (ISI) Color Space Conversion Matrix Coefficient C3 */
/* --- Register ISI_Y2R_SET1 */
#define AT91C_ISI_Y2R_C4      (0x1FF << 0 ) /**< (ISI) Color Space Conversion Matrix Coefficient C4 */
#define AT91C_ISI_Y2R_YOFF    (0xFF << 12) /**< (ISI) Color Space Conversion Luninance default offset */
#define AT91C_ISI_Y2R_CROFF   (0xFF << 13) /**< (ISI) Color Space Conversion Red Chrominance default offset */
#define AT91C_ISI_Y2R_CBFF    (0xFF << 14) /**< (ISI) Color Space Conversion Luninance default offset */
/* --- Register ISI_R2Y_SET0 */
#define AT91C_ISI_R2Y_C0      (0x7F << 0 ) /**< (ISI) Color Space Conversion RGB to YCrCb Matrix coefficient C0 */
#define AT91C_ISI_R2Y_C1      (0x7F << 1 ) /**< (ISI) Color Space Conversion RGB to YCrCb Matrix coefficient C1 */
#define AT91C_ISI_R2Y_C2      (0x7F << 3 ) /**< (ISI) Color Space Conversion RGB to YCrCb Matrix coefficient C2 */
#define AT91C_ISI_R2Y_ROFF    (0x1 << 4 ) /**< (ISI) Color Space Conversion Red component offset */
/* --- Register ISI_R2Y_SET1 */
#define AT91C_ISI_R2Y_C3      (0x7F << 0 ) /**< (ISI) Color Space Conversion RGB to YCrCb Matrix coefficient C3 */
#define AT91C_ISI_R2Y_C4      (0x7F << 1 ) /**< (ISI) Color Space Conversion RGB to YCrCb Matrix coefficient C4 */
#define AT91C_ISI_R2Y_C5      (0x7F << 3 ) /**< (ISI) Color Space Conversion RGB to YCrCb Matrix coefficient C5 */
#define AT91C_ISI_R2Y_GOFF    (0x1 << 4 ) /**< (ISI) Color Space Conversion Green component offset */
/* --- Register ISI_R2Y_SET2 */
#define AT91C_ISI_R2Y_C6      (0x7F << 0 ) /**< (ISI) Color Space Conversion RGB to YCrCb Matrix coefficient C6 */
#define AT91C_ISI_R2Y_C7      (0x7F << 1 ) /**< (ISI) Color Space Conversion RGB to YCrCb Matrix coefficient C7 */
#define AT91C_ISI_R2Y_C8      (0x7F << 3 ) /**< (ISI) Color Space Conversion RGB to YCrCb Matrix coefficient C8 */
#define AT91C_ISI_R2Y_BOFF    (0x1 << 4 ) /**< (ISI) Color Space Conversion Blue component offset */

#endif /* __AT91SAM9260_ISI_H */
